@ARTICLE{Sam_D._S._Shylu_Design_2022,
 author={Sam, D. S. Shylu and Sam Paul, P. and Jingle, Diana Jeba and Paul, P. Mano and Samuel, Judith and Reshma, J. and Sudeepa, P. Sarah and Evangeline, G.},
 volume={vol. 68},
 number={No 3},
 journal={International Journal of Electronics and Telecommunications},
 pages={565-570},
 howpublished={online},
 year={2022},
 publisher={Polish Academy of Sciences Committee of Electronics and Telecommunications},
 abstract={This work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence openloop comparator and mux-based encoder are used to obtain improved performance. Simulation results show that the simulated design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz and a supply voltage of 1V.},
 type={Article},
 title={Design of Low–power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Process},
 URL={http://ochroma.man.poznan.pl/Content/124267/PDF/15-3364-12088-1-PB.pdf},
 doi={10.24425/ijet.2022.141275},
 keywords={flash ADC, low power, dynamic comparator, encoder},
}