Details Details PDF BIBTEX RIS Title On Transformation of a Logical Circuit to a Circuit with NAND and NOR Gates Only Journal title International Journal of Electronics and Telecommunications Yearbook 2018 Volume vol. 64 Issue No 3 Authors Baranov Samary ; Karatkevich, Andrei Keywords logic synthesis ; logic devices ; VLSI ; minimization Divisions of PAS Nauki Techniczne Publisher Polish Academy of Sciences Committee of Electronics and Telecommunications Date 2018.08.23 Type Artykuły / Articles Identifier DOI: 10.24425/123535 ; eISSN 2300-1933 (since 2013) ; ISSN 2081-8491 (until 2012) Source International Journal of Electronics and Telecommunications; 2018; vol. 64; No 3 <div class="test"></div>