Details Details PDF BIBTEX RIS Title A new algorithm for generating integer partitions and its parallel implementations on CPU and FPGA Journal title International Journal of Electronics and Telecommunications Yearbook 2025 Volume vol. 71 Issue No 4 Authors Nałęcz, Marek ; Mazurek, Gustaw Affiliation Nałęcz, Marek : Faculty of Electronics and Information Technology, Warsaw University of Technology, Poland ; Mazurek, Gustaw : Faculty of Electronics and Information Technology,Warsaw University of Technology, Poland Keywords parallel combinatorial algorithms ; integer partitions ; field-programmable gate arrays ; bitwise operations Divisions of PAS Nauki Techniczne Coverage 1-8 Publisher Polish Academy of Sciences Committee of Electronics and Telecommunications Date 22.10.2025 Type Article Identifier DOI: 10.24425/ijet.2025.155467