Szczegóły Szczegóły PDF BIBTEX RIS Tytuł artykułu CMOS realisation of analogue processor for early vision processing Tytuł czasopisma Bulletin of the Polish Academy of Sciences Technical Sciences Rocznik 2011 Wolumin 59 Numer No 2 Autorzy Jendernalik, W. ; Jakusz, J. ; Blakiewicz, G. ; Piotrowski, R. ; Szczepański, S. Wydział PAN Nauki Techniczne Zakres 141-147 Data 2011 Identyfikator DOI: 10.2478/v10175-011-0018-x ; ISSN 2300-1917 Źródło Bulletin of the Polish Academy of Sciences: Technical Sciences; 2011; 59; No 2; 141-147 Referencje Dutkiewicz P. (2010), Vision localization system for mobile robot with velocities and acceleration estimator, Bull. Pol. Ac.: Tech, 58, 1, 29. ; Martin D. (1998), A mixed-signal array processor with early vision applications, IEEE J. Solid-State Circuits, 33, 3, 497, doi.org/10.1109/4.661216 ; Etienne-Cummings R. (2001), A programmable focal plane MIMD image processor chip, IEEE J. Solid-State Circuits, 36, 1, 64, doi.org/10.1109/4.896230 ; Schemmel J. (2002), A scalable switched capacitor realization of the resistive fuse network, Analog Integrated Circuits and Signal Processing, 32, 2, 135, doi.org/10.1023/A:1019526009597 ; Dupret A. (2002), A DSP-like analog processing unit for smart image sensors, Int. J. Circuit Theory and Application, 30, 595, doi.org/10.1002/cta.211 ; Dudek P. (2001), An analogue SIMD Focal Plane Processor Array, IEEE Int. Symp. Circuits and Systems, 1, 490. ; Dudek P. (2005), A general-purpose processor-perpixel analog SIMD vision chip, IEEE Trans. Circuits and Systems-I, 52, 1, 13, doi.org/10.1109/TCSI.2004.840093 ; Hillier D. (2008), Implementing the grayscale wave metric on a cellular array processor chip, 11th Int. Workshop on Cellular Neural Networks CNNA'2008, 1, 120, doi.org/10.1109/CNNA.2008.4588662 ; Dudek P. (2009), A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology, Proc. Eur. Conf. Circ. Theory and Design ECCTD' 2009, 1, 193, doi.org/10.1109/ECCTD.2009.5274946 ; Dudek P. (2000), A CMOS general-purpose sampleddata analog processing element, IEEE Trans. on Circuits and Systems-II, 47, 5, 467, doi.org/10.1109/82.842115 ; Jendernalik W. (2010), CMOS realisation of the specialized analogue processor aiding early vision processing, null, 1. ; A. El Gamal (2005), Cmos image sensors, IEEE Circuits & Devices Magazine, 21, 3, 6, doi.org/10.1109/MCD.2005.1438751 ; Krummenacher F. (1988), A 4-MHz CMOS continoustime filter with on-chip automatic tuning, IEEE J. Solid-State Circuits, 23, 3, 750, doi.org/10.1109/4.315 ; Szczepański S. (2004), Phase compensation scheme for feedforward linearized CMOS operational transconductance amplifier, Bull. Pol. Ac.: Tech, 52, 2, 141. ; Bult K. (1992), An inherently linear and compact MOST-only current division technique, IEEE J. Solid-State Circuits, 27, 12, 1730, doi.org/10.1109/4.173099 ; Carvajal R. (2005), The flipped voltage follower: a useful cell for low-voltage lowpower circuit design, IEEE Trans. Circuits and Systems-I, 52, 7, 1276, doi.org/10.1109/TCSI.2005.851387